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Photonics Senior Packaging and Assembly Engineer

Company: Intel
Location: Richmond
Posted on: May 27, 2023

Job Description:

Job Description
Intel Silicon Photonics Product Division (SPPD) is at the forefront of silicon photonics integration and is part of The Connectivity Group which is at the heart of Intel's transformation from a PC company to a company that powers the cloud and billions of smart, connected computing devices. Since announcing the world's first hybrid silicon laser nearly a decade ago, our team continues to lead the industry with cutting-edge technology and efficient, scalable high-volume manufacturing. Our dedication to advanced development ensures that Intel Silicon Photonics continues to drive future data center bandwidth growth with smaller form factors, co-packaging, and higher speeds from 400G today to 1.6T+ and beyond tomorrow. We are looking for great talent to accelerate this journey so if you are interested in joining our leading organization then we want to hear from you.
SPPD is looking for a motivated candidate to lead the OSAT assembly process development for LiDAR. The candidate for this position will be responsible to drive technology development programs, coming up with innovative solutions, planning experiments, and providing resources to drive the OSAT team to develop high yield cost-effective LiDAR assembly processes, and control systems for volume production on schedule and within budget. The applicant should be self-driven, have a solid technical background in process development fundamentals, with excellent documentation and communication skills across multiple cultures.
This leader will be required to partner across SPPD, Internal and external assembly (OSAT), our end customers, and with material suppliers. One key aspect of the job will require remote managing OSAT process development to enable successful product launch and ramp. OSAT management includes regular meeting coordination, AR tracking, removing roadblocks to enable faster data turns, balancing external customer requirements within OSAT feasible process window and proactively building data to demonstrate process qualification.
The Photonics Senior Packaging and Assembly Engineer will be responsible for:

  • Take Silicon Photonics wafer and chip level packaging and assembly product from concept to HVM release through an OSAT partner

  • Leveraging expertise in the development of advanced packaging technology and processes and expertise in substrate materials and molding compound materials, work with cross-functional teams to select the optimized package solution, like, FCBGA, FCMCM, WLCSP fan in, wafer or panel level fan out, chip on-chip, package on package, stacked die, TSV Si interposer, etc.

  • Oversee and lead the OSAT as well as internal packaging process development effort from concept through initial production ramp

  • Lead new equipment selection and installation activities if needed to support new bumping or assembly process development

  • Lead Failure and Root cause analysis and feedback to OSAT assembly process, SPC metrics to achieve high end-to-end assembly yield

  • Drive DFx for IC packaging design and assembly, Process FMEA, characterization, and monitoring

    The candidate should exhibit the following behavioral traits:

    • Strong structure model-based problem-solving skills

    • Highly self-motivated technical leader with the skills to multi-task and prioritize in a dynamic environment

      You must possess the minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
      Education Requirement:

      • The candidate must possess a Master's degree or Ph.D. in Chemical Engineering, Materials Science, Chemistry, Physics, Mechanical Engineering, or Electrical Engineering with 7+ years of experience in packaging and assembly technology development and manufacturing introduction.

        Minimum Qualifications:

        • 5+ years of hands-on experience in state-of-the-art CMOS (Intel) and/or photonics area with substantial package assembly process development and integration experience

        • 5+ years of experience with the latest generation wafer and assembly technologies - Wafer bumping and die prep, Flip Chip including Thermal Compression Bonding, Wire-bond, Heat Spreader Attach, Multichip packaging assembly, and the associated processes, materials, and equipment

          Preferred Qualifications:

          • 5+ years of hands-on experience with package assembly tools is a plus

          • Experience working to develop and bring new packaging/assembly processes through the development and into manufacturing, including the successful introduction of new products

          • Demonstrated strength to work both with internal teams as well as with external suppliers, and Out Sourced Assembly and Test vendors (OSATs) to lead development activities

          • Knowledge of failure analysis and assembly metrology techniques

            This position is not eligible for Intel immigration sponsorship.
            Inside this Business Group
            Corporate Strategy Office is chartered to support the executive office in driving corporate initiatives, including near and long-term strategy, major cross-group decision making and ensuring cross-company alignment. To deliver to that mission, the team owns shaping, driving and synthesizing insights to directionally orient trends as well as long range strategic planning/visioning , cross company alignment and greenfield innovation. Communications are essential to drive alignment so there is a focus on communications, community and acumen development. The team is ccommitted to ensuring that Intel efforts are aligned to, and actively driving success toward the most impactful business strategies.
            Other Locations
            US,NM,Albuquerque;US,CA,Santa Clara
            Covid Statement
            Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.
            Posting Statement
            All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
            We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:
            Annual Salary Range for jobs which could be performed in US, California: $118,860.00-$196,720.00
            *Salary range dependent on a number of factors including location and experience
            Working Model
            This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Keywords: Intel, Richmond , Photonics Senior Packaging and Assembly Engineer, Engineering , Richmond, Virginia

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